MPC5633MF0MMGA4 datasheet(21/118 Pages) FREESCALE

21 / 118 page

Overview

MPC5634M Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

— provides temperature of silicon as an analog value

— read using an internal ADC analog channel

— may be read with either ADC

•

Decimation Filter

— Programmable decimation factor (2 to 16)

— Selectable IIR or FIR filter

— Up to 4th order IIR or 8th order FIR

— Programmable coefficients

— Saturated or non-saturated modes

— Programmable Rounding (Convergent; Two’s Complement; Truncated)

— Pre-fill mode to pre-condition the filter before the sample window opens

•

Full duplex synchronous serial interface to an external device

— Free-running clock for use by an external device

— Supports a 26-bit message length

•

Priority based Queues

— Supports six Queues with fixed priority. When commands of distinct Queues are bound for the same ADC, the

higher priority Queue is always served first

— Queue_0 can bypass all prioritization, buffering and abort current conversions to start a Queue_0 conversion a

deterministic time after the queue trigger

— Supports software and hardware trigger modes to arm a particular Queue

— Generates interrupt when command coherency is not achieved

•

External hardware triggers

— Supports rising edge, falling edge, high level and low level triggers

— Supports configurable digital filter

•

Supports four external 8-to-1 muxes which can expand the input channels to 56 channels total

1.3.15

DSPI

The deserial serial peripheral interface (DSPI) block provides a synchronous serial interface for communication between the

MPC5634M MCU and external devices. The DSPI supports pin count reduction through serialization and deserialization of

eTPU and eMIOS channels and memory-mapped registers. The channels and register content are transmitted using a SPI-like

protocol. This SPI-like protocol is completely configurable for baud rate, polarity and phase, frame length, chip select assertion,

etc. Each bit in the frame may be configured to serialize either eTPU channels, eMIOS channels or GPIO signals. The DSPI

can be configured to serialize data to an external device that implements the Microsecond Bus protocol. There are two identical

DSPI blocks on the MPC5634M MCU. The DSPI pins support 5 V logic levels or Low Voltage Differential Signalling (LVDS)

to improve high speed operation.

The DSPIs have three configurations:

•

Serial peripheral interface (SPI) configuration where the DSPI operates as an up to 16-bit SPI with support for queues

•

Enhanced deserial serial interface (DSI) configuration where DSPI serializes up to 32 bits with three possible sources

per bit

— eTPU, eMIOS, new virtual GPIO registers as possible bit source

— Programmable inter-frame gap in continuous mode

— Bit source selection allows microsecond bus downlink with command or data frames up to 32 bits

— Microsecond bus dual receiver mode

•

Combined serial interface (CSI) configuration where the DSPI operates in both SPI and DSI configurations

interleaving DSI frames with SPI frames, giving priority to SPI frames

MPC5633MF0MMGA4 数据表(PDF) 21 Page - Freescale Semiconductor, Inc

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