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AS1524 数据表(PDF) 7 Page - ams AG

部件名 AS1524
功能描述  150ksps, 12-Bit, 1-Channel Pseudo/True-Differential and 2-Channel Single-Ended ADCs
PDF  22 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1524 数据表(HTML) 7 Page - ams AG

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www.austriamicrosystems.com
Revision 1.02
7 - 22
AS1524/AS1525
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Timing Characteristics
VDD = +2.7 to +5.25V, VREF = +2.5V, 4.7µF Capacitor at REF; fSCLK = 8MHz (50% Duty Cycle); AIN- = GND (AS1524)
TAMB = TMIN to TMAX (unless otherwise specified). Typical Values at TAMB = +25ºC.
Figure 3. DOUT Enable/Disable Time Load Circuits
Figure 4. Detailed Serial Interface Timing Diagram
Table 5. Timing Characteristics
Parameter
Symbol
Conditions
Min
Typ
Max
Units
SCLK Pulse Width High
tCH
38
ns
SCLK Pulse Width Low
tCL
38
ns
SCLK Falling-to-DOUT
Transition
tDOT
CLOAD = 30pF (see Figure 3, Figure 4,
Figure 19 on page 12, Figure 20 on
page 12)
28
60
ns
SCLK Rising-to-DOUT
1
Disable
1. Guaranteed by Design and Characterisation.
tDOD
CLOAD = 30pF (see Figure 3, Figure 4,
Figure 19 on page 12, Figure 20 on
page 12)
100
200
500
ns
CNVST Falling-to-MSB Vlid
tCONV
CLOAD = 30pF (see Figure 3, Figure 4,
Figure 19 on page 12, Figure 20 on
page 12)
3.3
3.7
µs
CNVST Pulse Width
tCSW
30
ns
CLOAD
6k
Ω
GND
GND
DOUT
DOUT
High-impedance to VOH, VOL to VOH, and VOH to High-impedance
VDD
6k
Ω
GND
CLOAD
DOUT
SCLK
CNVST
tCL
tCH
tDOT
tDOD
tCSW
High Z



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