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Revision 1.02

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AS1528/AS1529

Datasheet - A p p l i c a t i o n I n f o r m a t i o n

Figure 23. Microwire Serial Interface Connections

Figure 24. SPI/Microwire Interface Timing Diagram (CPOL = CPHA = 0)

QSPI Interface

Using the high-speed QSPI interface (Figure 25) with CPOL = 0 and CPHA = 0, the AS1528/AS1529 support a maxi-

DOUT data transitions on the serial clock’s falling edge and is clocked into the processor on SCLK’s rising edge. The

first 10 bits are the data. DOUT then goes high impedance (see Figure 23).

Figure 25. QSPI Serial Interface Connections

AS1528/

AS1529

CPU

SI

I/O

SK

7

DOUT

6

CNVST

8

SCLK

SCLK

CNVST

Sampling Instant

1

4

8

12

DOUT

High Z

16

1st Byte Read

2nd Byte Read

B8

B7

B6

B5

B4

B3

B2

B1

B9

MSB

B0

LSB

ZERO ZERO

AS1528/

AS1529

CPU

SSM

MISO

CSM

SCK

7

DOUT

6

CNVST

8

SCLK