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M24LR64-R 数据表(PDF) 53 Page - STMicroelectronics |
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M24LR64-R 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 126 page  M24LR64-R M24LR64-R to VCD frames Doc ID 15170 Rev 8 53/126 12.10 EOF when using two subcarriers 12.11 High data rate The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and 9 pulses at 484.28 kHz, followed by 24 pulses at 423.75 kHz (fC/32) and 27 pulses at 484.28 kHz (fC/28) as shown in Figure 45. For the Fast commands, the x2 mode is not available. Figure 45. End of frame, high data rate, two subcarriers 12.12 Low data rate The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and 36 pulses at 484.28 kHz, followed by 96 pulses at 423.75 kHz (fC/32) and 108 pulses at 484.28 kHz (fC/28) as shown in Figure 46. For the Fast commands, the x2 mode is not available. Figure 46. End of frame, low data rate, two subcarriers 112.39µs ai12088 37.46µs 449.56µs ai12089 149.84µs |
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