M24LR64-R datasheet(11/126 Pages) STMICROELECTRONICS

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M24LR64-R

List of figures

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Figure 49.

M24LR64-R state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Figure 50.

Principle of comparison between the mask, the slot number and the UID . . . . . . . . . . . . . 67

Figure 51.

Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Figure 52.

Stay Quiet frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . 75

Figure 53.

Read Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . 77

Figure 54.

Write Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . 79

Figure 55.

Read Multiple Block frame exchange between VCD and M24LR64-R. . . . . . . . . . . . . . . . 81

Figure 56.

Select frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 57.

Reset to Ready frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . 83

Figure 58.

Write AFI frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . 85

Figure 59.

Lock AFI frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 60.

Write DSFID frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . 89

Figure 61.

Lock DSFID frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . 91

Figure 62.

Get System Info frame exchange between VCD and M24LR64-R. . . . . . . . . . . . . . . . . . . 93

Figure 63.

Get Multiple Block Security Status frame exchange between VCD and M24LR64-R . . . . 95

Figure 64.

Write-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . 97

Figure 65.

Lock-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . 99

Figure 66.

Present-sector Password frame exchange between VCD and M24LR64-R . . . . . . . . . . 101

Figure 67.

Fast Read Single Block frame exchange between VCD and M24LR64-R . . . . . . . . . . . . 103

Figure 68.

Fast Initiate frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . 105

Figure 69.

Fast Read Multiple Block frame exchange between VCD and M24LR64-R. . . . . . . . . . . 107

Figure 70.

Initiate frame exchange between VCD and M24LR64-R . . . . . . . . . . . . . . . . . . . . . . . . . 109

Figure 71.

AC test measurement I/O waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Figure 72.

I2C AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Figure 73.

M24LR64-R synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Figure 74.

SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . 117

Figure 75.

UFDFPN8 (MLP8) – Ultra thin fine pitch dual flat package no lead

2 x 3 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Figure 76.

TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . 119

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