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M24LR64-R-MN6T/2 数据表(PDF) 66 Page - STMicroelectronics

部件名 M24LR64-R-MN6T/2
功能描述  64 Kbit EEPROM with password protection & dual interface: 400kHz I짼C serial bus & ISO 18000-3 mode 1 RF protocol at 13.56MHz
PDF  126 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M24LR64-R-MN6T/2 数据表(HTML) 66 Page - STMicroelectronics

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Anticollision
M24LR64-R
66/126
Doc ID 15170 Rev 8
21
Anticollision
The purpose of the anticollision sequence is to inventory the M24LR64-Rs present in the
VCD field using their unique ID (UID).
The VCD is the master of communications with one or several M24LR64-Rs. It initiates
M24LR64-R communication by issuing the Inventory request.
The M24LR64-R sends its response in the determined slot or does not respond.
21.1
Request parameters
When issuing the Inventory Command, the VCD:
sets the Nb_slots_flag as desired
adds the mask length and the mask value after the command field
The mask length is the number of significant bits of the mask value.
The mask value is contained in an integer number of bytes. The mask length indicates
the number of significant bits. LSB is transmitted first
If the mask length is not a multiple of 8 (bits), as many 0-bits as required will be added
to the mask value MSB so that the mask value is contained in an integer number of
bytes
The next field starts at the next byte boundary.
In the example of the Table 31 and Figure 50, the mask length is 11 bits. Five 0-bits are
added to the mask value MSB. The 11-bit Mask and the current slot number are compared
to the UID.
Table 30.
Inventory request format
MSB
LSB
SOF
Request_
flags
Command
Optional
AFI
Mask
length
Mask value
CRC
EOF
8 bits
8 bits
8 bits
8 bits
0 to 8 bytes
16 bits
Table 31.
Example of the addition of 0-bits to an 11-bit mask value
(b15) MSB
LSB (b0)
0000 0
100 1100 1111
0-bits added
11-bit mask value



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