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M24LR64-R-MB6T/2 数据表(PDF) 67 Page - STMicroelectronics

部件名 M24LR64-R-MB6T/2
功能描述  64 Kbit EEPROM with password protection & dual interface: 400kHz I짼C serial bus & ISO 18000-3 mode 1 RF protocol at 13.56MHz
PDF  126 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M24LR64-R-MB6T/2 数据表(HTML) 67 Page - STMicroelectronics

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M24LR64-R
Anticollision
Doc ID 15170 Rev 8
67/126
Figure 50.
Principle of comparison between the mask, the slot number and the UID
The AFI field is present if the AFI_flag is set.
The pulse is generated according to the definition of the EOF in ISO/IEC 15693-2.
The first slot starts immediately after the reception of the request EOF. To switch to the next
slot, the VCD sends an EOF.
The following rules and restrictions apply:
●
if no M24LR64-R answer is detected, the VCD may switch to the next slot by sending
an EOF,
●
if one or more M24LR64-R answers are detected, the VCD waits until the complete
frame has been received before sending an EOF for switching to the next slot.
AI06682
Mask value received in the Inventory command
0000 0100 1100 1111 b 16 bits
The Mask value less the padding 0s is loaded
into the Tag comparator
100 1100 1111 b 11 bits
The Slot counter is calculated
xxxx
Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
The Slot counter is concatened to the Mask value
xxxx 100 1100 1111 b
Nb_slots_flags = 0
15 bits
The concatenated result is compared with
the least significant bits of the Tag UID.
xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx
64 bits
LSB
MSB
b
LSB
MSB
LSB
MSB
LSB
MSB
b0
b63
Compare
Bits ignored
UID
4 bits



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