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M24LR64-R-DW6T/2 数据表(PDF) 42 Page - STMicroelectronics

部件名 M24LR64-R-DW6T/2
功能描述  64 Kbit EEPROM with password protection & dual interface: 400kHz I짼C serial bus & ISO 18000-3 mode 1 RF protocol at 13.56MHz
PDF  126 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M24LR64-R-DW6T/2 数据表(HTML) 42 Page - STMicroelectronics

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Data rate and data coding
M24LR64-R
42/126
Doc ID 15170 Rev 8
Figure 17.
Detail of a time period
9.2
Data coding mode: 1 out of 4
The value of 2 bits is represented by the position of one pause. The position of the pause on
1 of 4 successive time periods of 18.88 µs (256/fC), determines the value of the 2 bits. Four
successive pairs of bits form a byte, where the least significant pair of bits is transmitted first.
In this case the transmission of one byte takes 302.08 µs and the resulting data rate is 26.48
Kbits/s (fC/512). Figure 18 illustrates the 1 out of 4 pulse position technique and coding.
Figure 19 shows the transmission of E1h (225d - 1110 0001b) by the VCD.
AI06657
2
2
5
18.88 µs
9.44 µs
Pulse
Modulated
Carrier
2
2
6
2
2
4
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Time Period
one of 256



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