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LTC3633 数据表(PDF) 18 Page - Linear Technology |
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LTC3633 数据表(HTML) 18 Page - Linear Technology |
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18 / 28 page ![]() LTC3633 18 3633f APPLICATIONS INFORMATION The ratio of this divider should be the same as that of the slave channel’s feedback divider shown in Figure 5a. In this tracking mode, VOUT1 must be set higher than VOUT2. To implement the ratiometric tracking, the feedback pin of the master channel should connect to the TRACKSS pin of the slave channel (as in Figure 5b). By selecting different resistors, the LTC3633 can achieve different modes of tracking including the two in Figure 4. Upon start-up, the regulator defaults to Burst Mode opera- tion until the output exceeds 80% of its final value (VFB > 0.48V). Once the output reaches this voltage, the operating mode of the regulator switches to the mode selected by the MODE/SYNC pin as described above. During normal operation, if the output drops below 10% of its final value (as it may when tracking down, for instance), the regula- tor will automatically switch to Burst Mode operation to prevent inductor saturation and improve TRACKSS pin accuracy. Output Power Good The PGOOD output of the LTC3633 is driven by a 15Ω (typical) open-drain pull-down device. This device will be turned off once the output voltage is within 5% (typical) of the target regulation point, allowing the voltage at PGOOD to rise via an external pull-up resistor. If the output voltage exits an 8% (typical) regulation window around the target regulation point, the open-drain output will pull down with 15Ω output resistance to ground, thus dropping the PGOOD pin voltage. This behavior is described in Figure 6. Figure 6. PGOOD Pin Behavior PGOOD VOLTAGE OUTPUT VOLTAGE NOMINAL OUTPUT 0% 8% –5% 5% 3633 F06 –8% R3 R1 R4 R2 R3 VOUT2 R4 (5a) Coincident Tracking Setup TO VFB1 PIN TO TRACKSS2 PIN TO VFB2 PIN VOUT1 R1 R2 R3 VOUT2 R4 3633 F05 (5b) Ratiometric Tracking Setup TO VFB1 PIN TO TRACKSS2 PIN TO VFB2 PIN VOUT1 Figure 5. Setup for Coincident and Ratiometric Tracking A filter time of 40μs (typical) acts to prevent unwanted PGOOD output changes during VOUT transient events. As a result, the output voltage must be within the target regulation window of 5% for 40μs before the PGOOD pin pulls high. Conversely, the output voltage must exit the 8% regulation window for 40μs before the PGOOD pin pulls to ground. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine |
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