PixArt Imaging Inc.

PAS202BCA/PAS202BBA

CMOS Image Sensor IC

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10

PixArt Imaging Inc.

V1.2, May. 2002

4.3 I2C Bus Timing

Fig 4.4 I2C Bus Timing

4.4 I2C Bus Timing Specification

STANDARD-MODE

PARAMETER

SYMBOL

MIN.

MAX.

UNIT

SCL clock frequency

10

400

kHz

Hold tie (repeated) START condition.

After this period, the first clock pulse is generated.

4.0

-

us

Low period of the SCL clock

4.7

-

us

HIGH period of the SCL clock

0.75

-

us

Set-up time for a repeated START condition

4.7

-

us

Data hold time. For I2C-bus device

0

3.45

us

Data set-up time

250

-

ns

Rise time of both SDA and SCL signals

30

N.D.

ns(note1)

Fall time of both SDA and SCL signals

30

N.D.

ns(note1)

Set-up time for STOP condition

4.0

-

us

Bus free time between a STOP and START

4.7

-

us

Capacitive load for each bus line

1

15

pF

Noise margin at the LOW level for each connected

device (including hysteresis)

0.1

-

V

Noise margin at the HIGH level for each

connected device (including hysteresis)

0.2

-

V

Note 1: It depends on the "high" period time of SCL.

SDA

SCL

P

S

S