SI9993CS datasheet(3/16 Pages) VISHAY

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Si9993CS

Vishay Siliconix

FaxBack 408-970-5600, request 70653

S-60752–Rev. A, 05-Apr-99

www.siliconix.com

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)*

Voltage Referenced to GND Pin

VDD Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to 7 V

VCLAMP Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . .> (VCC - 0.3 V

and > (VDD - 0.3 V) to 14 V

VCC, VMOT Supply Range . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to 14 V

AGND, DGND, PWRGND to GND . . . . . . . . . . . . . . . . . . -0.3 to 0.3 V

SENA, SENB, SENC, CT, VCM+, VCM-Pin . . . . . -1.0 to VCC + 1.0 V

POR, FCOM, STEPCLK, ENCOM, SYSCLK, PWMIN,

PWMOUT, RESETVCM, IPCLK, IPDATA

and IPENABLE pins . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VDD + 0.3 V

All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VCC + 0.3 V

Maximum Current (All Input Pins) . . . . . . . . . . . . . . . . . . . . . . ±20 mA

Storage Temperature (Tstg) . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C

Operating Temperature (TA) . . . . . . . . . . . . . . . . . . . . . . . . .0 to 70°C

Junction Temperature (TJ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 W

Thermal Impedance (

JA) . . . . . . . . . . . . . . . . . . . . . . . . . . 6.25°C/W

* Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause

permanent damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be

applied at any one time. Device mounted on one-inch square FR4 Board.

SPECIFICATIONS

Operating Conditions:

VCC = VMOT = 12 V ±10%, VDD = 5 V ±10%, VREF(IN) = VREF(OUT), RSS = RSV = 0.2 Ω ±1%,

RSRADJ = 20 kΩ ±1%, Si9942-Si9430 LITTLE FOOT Driver, FSYSCLK = 5 MHz, TA = 0 to 70°C

Parameter

Symbol

Specific Test Conditions

Limits

Unit

Mina

Typb

Maxa

Power Supply

Supply Current

IDD

Normal Operation, Serial Port Idle

0.2

1.2

D7D6(REG0/5) = 00, All Clocks Disabled

0.02

0.1

ICC + IMOT +

ICLAMP

Normal Operation

No Load at VREF(OUT)

With VCM Load

Without VCM Load

D7D6(REG0/5) = 00, All Clocks Disabled

Control Logic

Low Input Current

IIL

VIN = 0 V

-1

µA

High Input Current

IIH

VIN = VDD

Low Input Voltage

(All Digital Inputs)

VIL

0.8

High Input Voltage

(All Digital Inputs)

VIH

2.0

Low Output Voltage (POR)VOL

IOUT = 4 mA

0.4

High Output Voltage (POR)VOH

IOUT = -4 mA

4.1

Low Output Voltage

(FCOM, PWMOUT)

VOL

IOUT = 2 mA

0.4

High Output Voltage

(FCOM, PWMOUT)

VOH

IOUT = -2 mA

4.1

IPDATA Setup Time to Rising

IPCLK Edge

See Timing Diagram, Figures 1 and 2.

Rising IPCLK Edge to IPDATA

Hold Time

IPDATA Clock Cycle Time

100

IPDATA Hold for IPDATA Driver

Turnaround

IPCLK High and Low Time

IPDATA Propagation Delay

WRT IPCLK Falling Edge

100

IPENABLE Setup Time WRT

IPCLK Rising Edge

100

IPENABLE Hold Time WRT

IPCLK Rising Edge

WRT IPCLK Falling Edge to

Data Tri-State

See Timing Diagram, Figures 1 and 2.

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