Wolfson Microelectronics

11

WM5620L, WM5620

Serial Input Decode

A1

A0

DAC

0

0

DACA

0

1

DACB

1

0

DACC

1

1

DACD

D7

D6

D5

D4

D3

D2

D1

D0

Output Voltage

0

0

0

0

0

0

0

0

GND

0

0

0

0

0

0

0

1

(1/256) x Ref (1 + RNG)

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

0

1

1

1

1

1

1

1

(127/256) x Ref (1 + RNG)

1

0

0

0

0

0

0

0

(128/256) x Ref (1 + RNG)

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

1

1

1

1

1

1

1

1

(255/256) x Ref (1 + RNG)

Using these inputs individual DACs can be updated using

one 11 bit serial input word and the LOAD pin. Using both

LOAD and LDAC, all or selected DACs can be updated

after an appropriate number of data words have been

inputted. Figures 3 & 4 illustrate operation with the 8 clock

pulses available from some microprocessors. If the data

input is interrupted in this way the clock input must be

held low during the break in clock pulses.

The RNG bit controls the DAC output range. When RNG

= 0 the output is between Vref(A,B,C,D) and GND and

when RNG = 1 the range is between 2 x Vref (A,B,C,D)

and GND.