Production Data

WM9701A

WOLFSON MICROELECTRONICS LTD.

PD Rev 3.2 January 2001

7

DATA SETUP AND HOLD (50PF EXTERNAL LOAD)

BIT_CLK

SYNC/

SDATA_OUT

/SDATA_IN

t

SETU

P

t

HOL

D

Figure 5 Data Setup and Hold (50pF External Load)

Note: Setup and hold time parameters for SDATA_IN are with respect to AC’97 Controller.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Setup to falling edge of

BIT_CLK

15.0

ns

Hold from falling edge of

BIT_CLK

5.0

ns

SIGNAL RISE AND FALL TIMES

BIT_CLK

SYNC

SDATA_IN

SDATA_OUT

trise

CLK

tfall

CLK

trise

SYNC

tfall

SYNC

trise

DIN

tfall

DIN

trise

DOUT

tfall

DOUT

Figure 6 Signal Rise and Fall Times (50pF external load)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

BIT_CLK rise time

26

ns

BIT_CLK fall time

26

ns

SYNC rise time

26

ns

SYNC fall time

26

ns

SDATA_IN rise time

26

ns

SDATA_IN fall time

26

ns

SDATA_OUT rise time

26

ns

SDATA_OUT fall time

26

ns