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WM9701ACFT/V 数据表(PDF) 14 Page - Wolfson Microelectronics plc

部件名 WM9701ACFT/V
功能描述  Low Power AC97 Multimedia Audio Codec
PDF  24 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM9701ACFT/V 数据表(HTML) 14 Page - Wolfson Microelectronics plc

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WM9701A
Production Data
WOLFSON MICROELECTRONICS LTD.
PD Rev 3.2 January 2001
14
SLOT 1: STATUS ADDRESS PORT
The status port is used to monitor status for WM9701A functions including, but not limited to, mixer
settings, and power management.
Audio input frame slot 1 echoes the control register index, for historical reference, for the data to be
returned in slot 2. (Assuming that slots 1 and 2 had been tagged “valid” by WM9701A during slot 0).
STATUS ADDRESS PORT BIT ASSIGNMENTS:
Bit(19)
RESERVED (stuffed with 0s)
Bit(18:12)
Control register index (echo of register index for which data is
being returned)
Bit(11:0)
RESERVED (stuffed with 0s)
The first bit (MSB) generated by WM9701A is always stuffed with a 0. The following 7 bit positions
communicate the associated control register address, and the trailing 12-bit positions are stuffed
with 0s by WM9701A.
SLOT 2: STATUS DATA PORT
The status data port delivers 16-bit control register read data.
Bit(19:4)
Control register read data (stuffed with 0s if tagged “invalid” by
WM9701)
Bit(3:0)
RESERVED (stuffed with 0s)
If slot 2 is tagged “invalid” by WM9701A, then the entire slot will be stuffed with 0s by WM9701A.
SLOT 3: PCM RECORD LEFT CHANNEL
Audio input frame slot 3 is the left channel output of WM9701A’s input Mux, post-ADC.
WM9701A’s ADCs can be implemented to support 16, 18, or 20-bit resolution. WM9701A ships out
its ADC output data (MSB first), and stuffs any trailing non-valid bit positions with 0s to fill out its 20-
bit time slot.
SLOT 4: PCM RECORD RIGHT CHANNEL
Audio input frame slot 4 is the right channel output of WM9701A’s input Mux, post-ADC.
WM9701A’s ADCs can be implemented to support 16, 18, or 20-bit resolution.
WM9701A ships out its ADC output data (MSB first), and stuffs any trailing non-valid bit positions
with 0s to fill out its 20-bit time slot.
SLOT 5: OPTIONAL MODEM LINE CODEC
Audio input frame slot 5 contains MSB justified modem ADC output data. This optional feature is not
supported by WM9701A. This may be determined by the AC’97 controller interrogating the
WM9701A Vendor ID register.
SLOT 6: OPTIONAL DEDICATED MICROPHONE RECORD DATA
Audio input frame slot 6 is an optional (post-ADC) third PCM system input channel available for
dedicated use by a desktop microphone. This optional AC’97 feature is not supported by WM9701A.
This may be determined by the AC’97 controller interrogating the WM9701A Vendor ID register.
SLOTS 7-12: RESERVED
Audio input frame slots 7-12 are reserved for future use and are always stuffed with 0s by
WM9701A.
AC-LINK LOW POWER MODE
The AC-link signals can be placed in a low power mode. When WM9701A’s power down Register
(26h), is programmed to the appropriate value, both BIT_CLK and SDATA_IN will be brought to, and
held at a logic low voltage level.
BIT_CLK and SDATA_IN are transitioned low immediately following the decode of the write to the
power down Register (26h) with PR4. When the AC’97 controller driver is at the point where it is
ready to program the AC-link into its low power mode, slots 1 and 2 are assumed to be the only valid



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