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ADP1650ACBZ-R7 数据表(PDF) 27 Page - Analog Devices |
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ADP1650ACBZ-R7 数据表(HTML) 27 Page - Analog Devices |
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27 / 32 page ![]() ADP1650 Rev. 0 | Page 27 of 32 The worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage is calcu- lated using the following equation: CEFF = COUT × (1 − TEMPCO) × (1 − TOL) where: CEFF is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. In this example, the 10μF X5R capacitor has the following: TEMPCO from −40°C to +85°C is 15%. TOL is 10%. COUT at VOUT (MAX) = 5 V, is 7 μF, as shown inFigure 43. 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 6.30 5.04 3.78 2.52 DC BIAS VOLTAGE (V) 1.26 0 Figure 42. DC Bias Characteristic of a 3 × 6.3 V, 10 μF Ceramic Capacitor Substituting these values in the equation yields CEFF =7 μF × (1 − 0.15) × (1 − 0.1) = 5.35 μF The effective capacitance needed for stability, which includes temperature and dc bias effects, is 3.0 μF. |
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