74ALVC32 datasheet(5/13 Pages) NXP

5 / 13 page

74ALVC32_2

Product data sheet

Rev. 02 — 10 December 2007

5 of 13

NXP Semiconductors

74ALVC32

Quad 2-input OR gate

[1]

All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25 °C.

10. Dynamic characteristics

[1]

Typical values are measured at Tamb =25 °C

[2]

tpd is the same as tPHL and tPLH.

[3]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

Σ(C

L × VCC

× f

o) = sum of the outputs

ICC

supply current

VCC = 3.6 V; VI =VCC or GND;

IO =0A

0.2

µA

∆ICC

additional supply current

per input pin; VCC = 3.0 V to 3.6 V;

VI =VCC − 0.6 V; IO =0A

750

µA

input capacitance

3.5

Table 6.

Static characteristics …continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

−40 °C to +85 °C

Unit

Min

Typ[1]

Max

Table 7.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol

Parameter

Conditions

−40 °C to +85 °C

Unit

Min

Typ[1]

Max

tpd

propagation delay

CP to Qn; see Figure 6

[2]

VCC = 1.65 V to 1.95 V

1.0

2.8

4.7

VCC = 2.3 V to 2.7 V

1.0

2.0

3.1

VCC = 2.7 V

1.0

2.2

2.9

VCC = 3.0 V to 3.6 V

1.0

2.0

2.8

CPD

power dissipation

capacitance

per gate; VI = GND to VCC; VCC = 3.3 V

[3]

-25-

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