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CS5461 数据表(PDF) 18 Page - Cirrus Logic |
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CS5461 数据表(HTML) 18 Page - Cirrus Logic |
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18 / 45 page ![]() CS5461 18 DS546F2 be set to the level that represents the absolute max- imum instantaneous voltage level that needs to be measured across the inputs (including the maxi- mum over-range level that must be accurately mea- sured). When performing AC gain calibration, an AC reference signal should be applied that repre- sents the desired maximum RMS level. A typical sinusoidal calibration value which allows for rea- sonable over-range margin would be 0.6 or 60% of the voltage/current channel’s maximum input volt- age level. For both AC and DC offset calibrations, the “+” and “-’ pins of the voltage/current channels should be connected to their ground reference level. (See Figure 5.) If offset and gain calibration command bits are set, only the offset calibration will be performed. 4.4.6 Description of Calibration Algo- rithms The computational flow of the CS5461’s AC and DC gain/offset calibration sequences are illustrated in Figure 6. This figure applies to both the voltage channel and the current channel. Note: For proper AC calibration, the value of the Voltage/Current Gain Registers must be set to default (1.0) before running the gain calibration(s), and the value in the AC Offset Registers must be set to default (0) before running calibrations. This can be accomplished by a software or hardware reset of the device. The values in the voltage/current calibration registers do affect the results of the calibration sequences. 4.4.6.1 AC Offset Calibration Sequence The AC offset calibration obtains an offset value that reflects the RMS output level when the inputs are grounded. During normal operation, this AC offset register value will be subtracted from each successive voltage/current sample in order to nulli- fy the AC offset that may be inherent in the signal path. 4.4.6.2 DC Offset Calibration Sequence The DC Offset Registers hold the negative of the simple average of N samples taken while the DC offset calibration was executed. The inputs should be grounded during DC offset calibration. The DC offset value is added to the signal path to nullify the DC offset in the system. 4.4.6.3 AC Gain Calibration Sequence The AC gain calibration algorithm attempts to ad- just the Gain Register value such that the calibra- tion reference signal level presented at the voltage inputs will result in a value of 0.6 in the RMS Volt- age Register. The rms level of the calibration signal must be determined by the user. During AC voltage gain calibration, the value in the RMS Voltage Register is divided into 0.6 and stored in the Volt- age Gain Register. Two examples of AC calibration and the resulting shift in the digital output codes of the channel’s in- stantaneous data registers are shown in Figures 7 and 8. Figure 8 shows that a positive (or negative) DC level signal can be used even though an AC gain calibration is being executed. However, an AC signal cannot be used for DC gain calibration. + - XGAIN + - External Connections + - AIN+ AIN- CM +- Full Scale (DC or AC) Figure 4. System Calibration of Gain. + - XGAIN + - External Connections 0V +- AIN+ AIN- CM +- Figure 5. System Calibration of Offset. |
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