CS5461 datasheet(39/45 Pages) CIRRUS

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CS5461

DS546F2

7.16 VSAGDuration: Voltage Sag-Detect Duration Level

Address: 24

Default** = 0x000000

This Register sets the number of conversions over to accumulate RMS voltage for comparison against the VSA-

GLEVEL. Setting this register to zero will disable the VSAG feature.

7.17 Control Register

Default** = 0x000000

FAC

1 = enable anti-creep for FOUT pulse output function.

EAC

1 = enable anti-creep for EOUT pulse output function.

STOP

1 = used to terminate the new EEBOOT sequence.

MECH

1 = widens EOUT and EDIR pulses for mechanical counters.

INTOD

1 = Converts INT output to open drain configuration.

NOCPU

1 = saves power by disabling the CPUCLK external drive pin.

NOOSC

1 = saves power by disabling the crystal oscillator circuit.

STEP

1 = enables stepper-motor signals on the EOUT/EDIR pins.

MSB

LSB

223

222

221

220

219

218

217

216

.....

FAC

EAC

STOP

654

MECH

INTOD

NOCPU

NOOSC

STEP

CS5461 数据表(PDF) 39 Page - Cirrus Logic

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