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PCA9633DP2 数据表(PDF) 2 Page - NXP Semiconductors |
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PCA9633DP2 数据表(HTML) 2 Page - NXP Semiconductors |
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2 / 43 page ![]() PCA9633_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 25 July 2008 2 of 43 NXP Semiconductors PCA9633 4-bit Fm+ I2C-bus LED driver 2. Features I 4 LED drivers. Each output programmable at: N Off N On N Programmable LED brightness N Programmable group dimming/blinking mixed with individual LED brightness I 1 MHz Fast-mode Plus I2C-bus interface with 30 mA high drive capability on SDA output for driving high capacitive buses I 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 97 kHz PWM signal I 256-step group brightness control allows general dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default) I 256-step group blinking with frequency programmable from 24 Hz to 10.73 s and duty cycle from 0 % to 99.6 % I Four totem pole outputs (sink 25 mA and source 10 mA at 5 V) with software programmable open-drain LED outputs selection (default at totem pole). No input function. I Output state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’). I Active LOW Output Enable (OE) input pin. LED outputs programmable to ‘1’, ‘0’ or ‘high-impedance’ (default at power-up) when OE is HIGH, thus allowing hardware blinking and dimming of the LEDs (16-pin version only). I 2 hardware address pins (10-pin version) and 7 hardware address pins (16-pin version) allow respectively up to 4 and 126 devices to be connected to the same I2C-bus. No hardware address pins in the 8-pin version. I 4 software programmable I2C-bus addresses (one LED Group Call address and three LED Sub Call addresses) allow groups of devices to be addressed at the same time in any combination (for example, one register used for ‘All Call’ so that all the PCA9633s on the I2C-bus can be addressed at the same time and the second register used for three different addresses so that 1 ⁄ 3 of all devices on the bus can be addressed at the same time in a group). Software enable and disable for I2C-bus address. I Software Reset feature (SWRST Call) allows the device to be reset through the I2C-bus I 25 MHz internal oscillator requires no external components I Internal power-on reset I Noise filter on SDA/SCL inputs I Edge rate control on outputs I No glitch on power-up I Supports hot insertion I Low standby current I Operating power supply voltage range of 2.3 V to 5.5 V I 5.5 V tolerant inputs I −40 °C to +85 °C operation I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA |
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