PCF85133USLASH2DASLASH1 datasheet(3/41 Pages) NXP

3 / 41 page

PCF85133_1

Product data sheet

Rev. 1 — 17 February 2009

3 of 41

NXP Semiconductors

PCF85133

Universal LCD driver for low multiplex rates

Pinning information

6.1 Pinning

6.2 Pin description

Top view. For mechanical details, see Figure 23.

Fig 2.

Pinning of PCF85133

001aaj559

PCF85133

Table 3.

Pin description overview

Symbol

Description

SDAACK

1 to 3

I2C-bus acknowledge output

SDA

4 to 6

I2C-bus serial data input

SCL

7 to 9

I2C-bus serial clock input

CLK

clock input/output

VDD

11 to 13

supply voltage

SYNC

cascade synchronization input/output

OSC

oscillator select

frame frequency select

A0, A1 and A2

17 to 19

subaddress input

SA0

I2C-bus slave address input

VSS

21 to 23

ground supply voltage

VLCD

24 to 26

LCD supply voltage

BP2, BP0, BP3 and BP1

27, 28, 109 and 110 LCD backplane output

S0 to S79

29 to 108

LCD segment output

D1 to D9

dummy pads

PCF85133U/2DA/1 数据表(PDF) 3 Page - NXP Semiconductors

PCF85133U/2DA/1 数据表(HTML) 3 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

数据表下载