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VDIP1 数据表(PDF) 7 Page - Future Technology Devices International Ltd. |
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VDIP1 数据表(HTML) 7 Page - Future Technology Devices International Ltd. |
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7 / 23 page ![]() ` Copyright © 2010 Future Technology Devices International Limited 6 Document Reference No.: FT_000016 VDIP1 Vinculum VNC1L Module Datasheet Version 1.01 Clearance No.: FTDI# 131 3.3 I/O Configuration Using The Jumper Pin Header Two three way jumper pin headers are provided to allow for simple configuration of the I/O on data and control bus pins of the VDIP1. This is done by a combination of pulling up or pulling down the VNC1L ACBUS5 (pin 46) and ACBUS6 (pin 47). The relevant portion of the VDIP1 module schematic is shown in Figure 3.2 Figure 3.2 – VDIP1 On-Board Jumper Pin Configuration. ACBUS6 (VNC1L pin 47) ACBUS5 (VNC1L pin 46) I/O Mode Pull-Up Pull-Up Serial UART Pull-Up Pull-Down SPI Pull-Down Pull-Up Parallel FIFO Pull-Down Pull-Down Serial UART Table 3.2 - VDIP1 Port Selection Jumper Pins |
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