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SC18IM700IPW 数据表(PDF) 6 Page - NXP Semiconductors |
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SC18IM700IPW 数据表(HTML) 6 Page - NXP Semiconductors |
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6 / 22 page ![]() SC18IM700_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 10 August 2007 6 of 22 NXP Semiconductors SC18IM700 Master I2C-bus controller with UART interface 7.1.4 Read from 18IM internal register The host issues the internal register read command by sending an R character followed by the registers to be read. The frame is then terminated with a P character. Once the command is issued, SC18IM700 will access its internal registers and returns the contents of these registers to the host. 7.1.5 Write to GPIO port The host issues the output port write command by sending an O character followed by the data to be written to the output port. This command enables the host to quickly set any GPIO pins programmed as output without having to write to the SC18IM700 internal IOState register. 7.1.6 Read from GPIO port The host issues the input port read command by sending an I character. This command enables the host to quickly read any GPIO pins programmed as input without having to read the SC18IM700 internal IOState register. Once the command is issued, SC18IM700 will read its internal IOState register and returns its content to the host. 7.1.7 Repeated START: read after write The SC18IM700 also supports ‘read after write’ command as specified in the NXP Semiconductors I2C-bus specification. This allows a read command to be sent after a write command without having to issue a STOP condition between the two commands. The host issues a write command as normal, then immediately issues a read command without sending a STOP (P) character after the write command. Fig 6. Read from 18IM internal register 002aac051 R CHAR. REGISTER 0 REGISTER N P CHAR. 18IM responds DATA 0 DATA N Fig 7. Write to output port 002aac052 O CHAR. DATA P CHAR. Fig 8. Read from output port 002aac053 I CHAR. 18IM responds DATA P CHAR. |
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