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MPR121 数据表(PDF) 42 Page - Freescale Semiconductor, Inc |
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MPR121 数据表(HTML) 42 Page - Freescale Semiconductor, Inc |
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42 / 57 page ![]() MPR121 Sensors 42 Freescale Semiconductor 7.0 AFE and Filter Configuration Register The last two registers relevant to proximity detection are the AFE Configuration Register and Filter Configuration Register. These two registers set the numbers of samples for the 2 level filters and the sampling interval for the second level filter. The FFI[1:0], SFI[1:0] and ESI[2:0] bits in the registers are those related to the first filter, second filter and sample interval respectively. These two registers are powered up with default setting of 0x24 and 0x10 respectively. The default setting is already workable for proximity sensing, but since ESI[2:0] is 100, the sampling interval is at 16 ms. If lower power consumption is desired, the user can adjust it to the value to find a balance between the proximity detection response time current consumption. For a detailed explanation on these registers, please refer to Freescale application note AN3890. OTHER DESIGN CONSIDERATIONS 1. Remember the paralleled plate capacitor model when considering the proximity detection. Larger sensing area (the effective sensing area formed by the sensing pad and material under detection, e.g. the surface area of hand projected to the sensing pad) gives longer proximity sensing distance. 2. The electric energy store in the capacitance (thus the strength of the sensing field) is proportional to the square of the voltage potential applied. Setting the auto-configure target level as high as possible will help extend the proximity sensing range. 3. Since increasing the sensing pad area also has the problem of making it easier to receive the electric noise. It’s possible that the original solid sensing pad can be replaced by a series of circles or x hatch patterns. Refer to Freescale application note AN3863 for more detailed discussion on electrode and layout design considerations. Table 42. Filter Configuration Registers 0x5D (Reset Default: 0x24) 0x5D Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CDT[2:0] SFI[1:0] ESI[2:0] Table 43. AFE Configuration Registers 0x5C (Reset Default: 0x10) 0x5C Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 FFI[1:0] CDC[4:0] |
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