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MCP4331-103E/ML 数据表(PDF) 51 Page - Microchip Technology

部件名 MCP4331-103E/ML
功能描述  7/8-Bit Quad SPI Digital POT with Volatile Memory
PDF  88 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP4331-103E/ML 数据表(HTML) 51 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS22242A-page 51
MCP433X/435X
7.0
DEVICE COMMANDS
The MCP43XX’s SPI command format supports
16 memory address locations and four commands.
Each command has two modes:
• Normal Serial Commands
• High-Voltage Serial Commands
Normal serial commands are those where the CS pin is
driven to VIL. With high-voltage serial commands, the
CS pin is driven to VIHH. In each mode, there are four
possible commands. These commands are shown in
Table 7-1.
The
8-bit
commands
(Increment
Wiper
and
Decrement Wiper commands) contain a command
byte, see Figure 7-1, while 16-bit commands (Read
Data and Write Data commands) contain a command
byte and a data byte. The command byte contains two
data bits, see Figure 7-1.
Table 7-2 shows the supported commands for each
memory location and the corresponding values on the
SDI and SDO pins.
Table 7-3 shows an overview of all the SPI commands
and their interaction with other device features.
7.1
Command Byte
The command byte has three fields, the address, the
command, and 2 data bits, see Figure 7-1. Currently
only one of the data bits is defined (D8). This is for the
Write command.
The device memory is accessed when the master
sends a proper command byte to select the desired
operation. The memory location getting accessed is
contained in the command byte’s AD3:AD0 bits. The
action desired is contained in the command byte’s
C1:C0 bits, see Table 7-1. C1:C0 determines if the
desired memory location will be read, written,
incremented (wiper setting +1) or decremented (wiper
setting -1). The Increment and Decrement commands
are only valid on the volatile wiper registers.
As the command byte is being loaded into the device
(on the SDI pin), the device’s SDO pin is driving. The
SDO pin will output high bits for the first six bits of that
command. On the 7th bit, the SDO pin will output the
CMDERR
bit
state
(see
Section 7.3
“Error
Condition”). The 8th bit state depends on the
command selected.
FIGURE 7-1:
General SPI Command Formats.
TABLE 7-1:
COMMAND BIT OVERVIEW
C1:C0
Bit
States
Command
# of
Bits
Operates on
Volatile/
Nonvolatile
memory
11
Read Data
16-Bits Both
00
Write Data
16-Bits Both
01
Increment
8-Bits
Volatile Only
10
Decrement
8-Bits
Volatile Only
A
D
3
A
D
2
A
D
1
A
D
0
C
1
C
0
D
9
D
8
Memory
Command Byte
Data
Address
Bits
Command
Bits
A
D
3
A
D
2
A
D
1
A
D
0
C
1
C
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Memory
16-bit Command
Data
Address
Bits
Command
Bits
0 0 = Write Data
0 1 = INCR
1 0 = DECR
1 1 = Read Data
C C
1 0
Command
Bits
8-bit Command
Command Byte
Data Byte



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