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PCM4104IPFBREP 数据表(PDF) 19 Page - Texas Instruments |
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PCM4104IPFBREP 数据表(HTML) 19 Page - Texas Instruments |
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19 / 43 page ![]() www.ti.com Analog Outputs 65,536 SCKI Periods Outputs are On Outputs are Muted RST 0V V DD Analog Outputs 1024 SCKI Periods Required for Initialization 1024 SCKI Periods Required for Initialization Outputs are On Outputs are On Outputs are On Outputs are High Impedance Outputs are High Impedance Outputs Transition from High Impedance to Muted State Outputs Transition from High Impedance to Muted State PDN12 PDN34 LO HI Outputs are On Transitioning to Driven State AUDIO SERIAL PORT LRCK BCK DATA0 DATA1 FSX CLKX DX0 DX1 System Clock PCM4104 DSP SCKI PCM4104-EP SBAS419 – JUNE 2007 Figure 8. Analog Output State for Power-Down Operations The audio serial port provides a common interface to digital signal processors, digital interface receivers (AES3, S/PDIF), and other digital audio devices. The port operates as a slave to the processor, receiver, or other clock generation circuitry. Figure 9 illustrates a typical audio serial port connection to a processor or receiver. The audio serial port is comprised of four signal pins: BCK (pin 15), LRCK (pin 16), DATA0 (pin 17), and DATA1 (pin 18). Figure 9. Audio Serial Port Connections for Left Justified, Right Justified, and I2S Formats 19 Submit Documentation Feedback |
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