DSPIC30F0010AT-20ESLASHPF datasheet(77/232 Pages) MICROCHIP

77 / 232 page

DS70150D-page 77

dsPIC30F6010A/6015

11.0 TIMER4/5 MODULE

This section describes the second 32-bit General

Purpose (GP) Timer module (Timer4/5) and associated

operational modes. Figure 11-1 depicts the simplified

block diagram of the 32-bit Timer4/5 Module.

Figure 11-2 and Figure 11-3 show Timer4/5 configured

as two independent 16-bit timers, Timer4 and Timer5,

respectively.

The Timer4/5 module is similar in operation to the

Timer2/3

module.

However,

there

are

some

differences, which are listed below:

• The Timer4/5 module does not support the ADC

Event Trigger feature

FIGURE 11-1:

32-BIT TIMER4/5 BLOCK DIAGRAM

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals, register descriptions and

general device functionality, refer to the

“dsPIC30F Family Reference Manual”

(DS70046).

Note:

Timer4 is a Type B timer and Timer5 is a

Type C timer. Please refer to the

appropriate timer type in Section 24.0

"Electrical

Characteristics"

this

document.

TMR5

TMR4

T5IF

Equal

Comparator x 32

PR5

PR4

Reset

LSB

MSB

Event Flag

Note:

Timer Configuration bit T45, T4CON(<3>) must be set to ‘

1’ for a 32-bit timer/counter operation. All

control bits are respective to the T4CON register.

Data Bus<15:0>

TMR5HLD

Read TMR4

Write TMR4

TGATE(T4CON<6>)

(T4CON<6>)

TGATE

TON

TCKPS<1:0>

Prescaler

1, 8, 64, 256

TCY

1 x

0 1

0 0

Gate

T4CK

Sync

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