ST72F324J2T6 datasheet(16/164 Pages) STMICROELECTRONICS

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ST72324Jx ST72324Kx

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Legend: x=undefined, R/W=read/write

Notes:

1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-

tion, the values of the I/O pins are returned instead of the DR register contents.

2. The bits associated with unavailable pins must always keep their reset value.

3. The Timer A Input Capture 2 pin is not available (not bonded).

– In Flash devices:

The TAIC2HR and TAIC2LR registers are not present. Bit 5 of the TACSR register (ICF2) is forced

by hardware to 0. Consequently, the corresponding interrupt cannot be used.

4. The Timer A Output Compare 2 pin is not available (not bonded).

– The TAOC2HR and TAOC2LR Registers are write only, reading them will return undefined values.

Bit 4 of the TACSR register (OCF2) is forced by hardware to 0. Consequently, the corresponding in-

terrupt cannot be used.

Caution: The TAIC2HR and TAIC2LR registers and the ICF2 and OCF2 flags are not present in Flash de-

vices but are present in the emulator. For compatibility with the emulator, it is recommended to perform a

dummy access (read or write) to the TAIC2LR and TAOC2LR registers to clear the interrupt flags.

ST72F324J2T6 数据表(PDF) 16 Page - STMicroelectronics