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P912XDP512F0MPVR 数据表(PDF) 561 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 561 Page - Freescale Semiconductor, Inc |
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561 / 1348 page ![]() Chapter 14 Voltage Regulator (S12VREG3V3V5) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 561 14.3.2.4 Autonomous Periodical Interrupt Trimming Register (VREGAPITR) The VREGAPITR register allows to trim the API timeout period. 76543210 R APITR5 APITR4 APITR3 APITR2 APITR1 APITR0 00 W Reset 01 01 01 01 01 01 00 1. Reset value is either 0 or preset by factory. See Device User Guide for details. = Unimplemented or Reserved Figure 14-5. Autonomous Periodical Interrupt Trimming Register (VREGAPITR) Table 14-5. VREGAPITR Field Descriptions Field Description 7–2 APITR[5:0] Autonomous Periodical Interrupt Period Trimming Bits — See Table 14-6 for trimming effects. Table 14-6. Trimming Effect of APIT Bit Trimming Effect APITR[5] Increases period APITR[4] Decreases period less than APITR[5] increased it APITR[3] Decreases period less than APITR[4] APITR[2] Decreases period less than APITR[3] APITR[1] Decreases period less than APITR[2] APITR[0] Decreases period less than APITR[1] |
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