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P912XDP512F0MPVR 数据表(PDF) 562 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 562 Page - Freescale Semiconductor, Inc |
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562 / 1348 page ![]() Chapter 14 Voltage Regulator (S12VREG3V3V5) MC9S12XDP512 Data Sheet, Rev. 2.21 562 Freescale Semiconductor 14.3.2.5 Autonomous Periodical Interrupt Rate High and Low Register (VREGAPIRH / VREGAPIRL) The VREGAPIRH and VREGAPIRL register allows the configuration of the VREG_3V3 autonomous periodical interrupt rate. 76543210 R 0000 APIR11 APIR10 APIR9 APIR8 W Reset 00000000 = Unimplemented or Reserved Figure 14-6. Autonomous Periodical Interrupt Rate High Register (VREGAPIRH) 76543210 R APIR7 APIR6 APIR5 APIR4 APIR3 APIR2 APIR1 APIR0 W Reset 00000000 Figure 14-7. Autonomous Periodical Interrupt Rate Low Register (VREGAPIRL) Table 14-7. VREGAPIRH / VREGAPIRL Field Descriptions Field Description 11-0 APIR[11:0] Autonomous Periodical Interrupt Rate Bits — These bits define the timeout period of the API. See Table 14-8 for details of the effect of the autonomous periodical interrupt rate bits. Writable only if APIFE = 0 of VREGAPICL register. |
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