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P912XDP512F0MPVR 数据表(PDF) 655 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 655 Page - Freescale Semiconductor, Inc |
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655 / 1348 page ![]() Chapter 18 Memory Mapping Control (S12XMMCV3) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 655 Table 18-2. External Input Signals Associated with the MMC Signal I/O Description Availability MODC I Mode input Latched after RESET (active low) MODB I Mode input Latched after RESET (active low) MODA I Mode input Latched after RESET (active low) EROMCTL I EROM control input Latched after RESET (active low) ROMCTL I ROM control input Latched after RESET (active low) Table 18-3. External Output Signals Associated with the MMC Signal I/O Description Available in Modes NS SS NX ES EX ST CS0 O Chip select line 0 (see Table 18-4) CS1 O Chip select line 1 CS2 O Chip select line 2 CS3 O Chip select line 3 |
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