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P912XDP512F0MPVR 数据表(PDF) 657 Page - Freescale Semiconductor, Inc

部件名 P912XDP512F0MPVR
功能描述  HCS12X Microcontrollers
PDF  1348 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

P912XDP512F0MPVR 数据表(HTML) 657 Page - Freescale Semiconductor, Inc

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Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
657
18.3.2
Register Descriptions
18.3.2.1
MMC Control Register (MMCCTL0)
Read: Anytime. In emulation modes read operations will return the data from the external bus. In all other
modes the data is read from this register.
Write: Anytime. In emulation modes write operations will also be directed to the external bus.
The MMCCTL0 register is used to control external bus functions, i.e., availability of chip selects.
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
0x011D
RAMXGU
R
1
XGU6
XGU5
XGU4
XGU3
XGU2
XGU1
XGU0
W
0x011E
RAMSHL
R
1
SHL6
SHL5
SHL4
SHL3
SHL2
SHL1
SHL0
W
0x011F
RAMSHU
R
1
SHU6
SHU5
SHU4
SHU3
SHU2
SHU1
SHU0
W
Address: 0x000A PRR
76543210
R
0000
CS3E
CS2E
CS1E
CS0E
W
Reset
0000000
ROMON1
1. ROMON is bit[0] of the register MMCTL1 (see Figure 18-10)
= Unimplemented or Reserved
Figure 18-3. MMC Control Register (MMCCTL0)
Table 18-4. Chip Selects Function Activity
Register Bit
Chip Modes
NS
SS
NX
ES
EX
ST
CS3E, CS2E, CS1E, CS0E
Disabled1
1 Disabled: feature always inactive.
Disabled
Enabled2
2 Enabled: activity is controlled by the appropriate register bit value.
Disabled
Enabled
Enabled
Address
Register
Name
Bit 7
654321
Bit 0
= Unimplemented or Reserved
Figure 18-2. MMC Register Summary



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