P912XDP512F0MPVR datasheet(764/1348 Pages) FREESCALE

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Chapter 20 S12X Debug (S12XDBGV3) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

766

Freescale Semiconductor

20.3.2.8.4

Debug Comparator Address Low Register (DBGXAL)

Read: Anytime

Write: Anytime when S12XDBG not armed.

20.3.2.8.5

Debug Comparator Data High Register (DBGXDH)

Read: Anytime

Write: Anytime when S12XDBG not armed.

Address: 0x002B

76543210

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

00000000

Figure 20-17. Debug Comparator Address Low Register (DBGXAL)

Table 20-31. DBGXAL Field Descriptions

Field

Description

7–0

Bits[7:0]

Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the

selected comparator will compare the address bus bits [7:0] to a logic one or logic zero.

0 Compare corresponding address bit to a logic zero

1 Compare corresponding address bit to a logic one

Address: 0x002C

76543210

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Reset

00000000

Figure 20-18. Debug Comparator Data High Register (DBGXDH)

Table 20-32. DBGXAH Field Descriptions

Field

Description

7–0

Bits[15:8]

Comparator Data High Compare Bits — The Comparator data high compare bits control whether the selected

comparator compares the data bus bits [15:8] to a logic one or logic zero. The comparator data compare bits are

only used in comparison if the corresponding data mask bit is logic 1. This register is available only for

comparators A and C.

0 Compare corresponding data bit to a logic zero

1 Compare corresponding data bit to a logic one

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