
2-63
RF2125
Rev A7 010112
2
Application Schematic
1880MHz
Pin
Function
Description
Interface Schematic
1RF IN
RF input. This input is DC coupled, so an external blocking capacitor is
required if this pin is connected to a DC path. An optimum match to
50
Ω is obtained by providing an external series capacitor of 4.3pF and
then a shunt capacitor of 3.3pF; see the application schematic. Those
values are typical for 1880MHz; other values may be required for other
frequencies.
2RF IN
Same as pin 1.
3PC
Power control pin. For obtaining maximum performance the voltage on
this pin can be used to set correct bias level. In a typical application this
is implemented by a feedback loop. The feedback can be based on the
actual supply current of the device, i.e., maintaining a fixed current
level, or it can be based on the RF output power level to maintain a
fixed RF power level (Automatic Level Control loop). A voltage of 0.5V
or lower brings the part into power down state.
4VCC
Power supply pin for the bias circuits. External low frequency bypass
capacitors should be connected if no other low frequency decoupling is
nearby.
5RF OUT
RF output and bias for the output stage. The power supply for the out-
put transistor needs to be supplied to this pin. This can be done
through a quarter wave length microstrip line that is RF grounded at the
other end, or through an RF inductor that supports the required DC cur-
rents. Optimum load impedance is achieved by providing a shunt
capacitor of 3.0pF and a series capacitor of 3.9pF; see the application
schematic. Those values are typical for 1880MHz; other values may be
required for other frequencies. Since there are several output pins
available, which are internally connected, one pin can be used for con-
necting the bias, another for connecting a (third) harmonic trap filter,
and the other pins for the RF output.
6RF OUT
Same as pin 5.
7RF OUT
Same as pin 5.
8RF OUT
Same as pin 5.
Pkg
Base
GND
Ground connection. The backside of the package should be connected
to the ground plane through a short path, i.e., vias under the device
may be required.
1
2
3
4
8
7
6
5
BIAS
CIRCUIT
PACKAGE BASE
33 nH
3.3 pF
100 nF
3.9 pF
100 pF
100 nF
3.3 pF
RF IN
RF OUT
5.1 pF
V
CC
V
PD