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Preliminary
2-208
RF2162
Rev A17 011011
2
Application Schematic - US CDMA
330
Ω
100 pF
100 pF
100 pF
100 pF
1k
Ω
100 pF
9.1 pF**
5.1 pF**
100 pF
27 nH*
100 pF
10 nF
1pF
0
Ω
TL
1
TL
2
* High Q inductor (i.e., Coilcraft 0805HQ-series).
**High Q capacitors (i.e., Johanson C-series).
16
1
13
14
15
2
3
4
9
8
7
6
5
12
11
10
10 nH
0
Ω
15 nH
100 pF
1.8 nH
TL
3
TL
4
1nH
RF OUT
RF IN
VREG
VMODE
V
CC
2nd Harmonic Trap
Bypassing for V
CC
Interstage tuning for centering
frequency response
To Vary Gain
Matching network for
optimum input return loss
Bypassing for
V
REG1 and VREG2
Matching network for
optimum load impedance
Bias Return