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Preliminary
2-209
RF2162
Rev A17 011011
2
Application Schematic - US TDMA
820
Ω
C30
100 pF
100 pF
100 pF
1k
Ω
100 pF
12 pF**
4.7 pF**
16 nH*
100 pF
10 nF
1pF
0
Ω
TL
1
TL
2
* L1 is a High Q inductor (i.e.,Coilcraft 0805HQ-series).
**C1 and C14 are High Q capacitors (i.e., Johanson C-series).
16
1
13
14
15
2
3
4
9
8
7
6
5
12
11
10
27 nH
P1-1
1.5 nH
TL
5
TL
7
VREG
VMODE
3.6 pF
1.5 nH
100 pF
TL
3
RF OUT
RF IN
2nd Harmonic Trap
Interstage tuning for
centering frequency response
Bypassing for V
CC
To Vary Gain
Bypassing for
V
REG1 and VREG2
Bias Return
Matching network for
optimum load
impedance
15 nH
Matching network for
optimum input return loss
100 pF
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