SC415_08 datasheet(23/30 Pages) SEMTECH

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SC415

Applications Information (continued)

GND

(PAD)

SC415

Side 1 Power

Components

Side 2 Power

Components

Side 1

Analog

Components

Side 2

Analog

Components

PAD connection to the MOSFETs must therefore be done

on an inner or bottom layer. For this reason, it is best to

place the low-side MOSFET on the opposite side of the

pcb, to allow a wide and direct connection to the ground

PAD on the bottom layer. Otherwise an inner layer must

be used for the ground PAD connection; if needed, this

should be done with many vias to minimize the high-

frequency impedance. This applies to both side1 and

side2 MOSFETs.

The remaining power devices should then be placed with

their ground pins near each other, and near the IC. That

is, the ground connections between the IC, the low-side

MOSFET, the low-side diode (if used), the input capacitors,

and the output capacitor, should be short. The other non-

ground power connections (from input cap to high-side

MOSFET, from MOSFETs to inductor, and from inductor

to output capacitor) should be short and wide as well, to

minimize the loop length and area.

Use short, wide traces from the DL/DH pins to the MOSFETs

to reduce parasitic impedance; the low-side MOSFET is

most critical. Maintain a length to width ratio of <20:1

for gate drive signals. Use multiple vias as required for

current handling (and to reduce parasitics) if routed on

more than one layer.

When placing the power components, also be aware

that the VOUT signal must route back to the analog

components. It is important that this feedback signal not

cross the DH/DL/BST or other high-noise power signals.

Place and rotate the power components in a way that

allows the VOUT trace to get from the output capacitor to

the analog components without crossing the high-noise

power signals (DH/DL/BST, etc).

The analog components are those which connect to the

FB and VOUT pins. The FB pins are sensitive so the copper

area of these traces should be minimized. Components

connected to FB should be placed directly near the IC and

should not be placed over or near the gate drive or power

signals (DL/DH/BST/ILIM/LX/VDD).

Overall placement should look similar to this:

Figure 18

The connection between power ground (PAD) and analog

ground (RTN) should be done at a single point directly at

the IC. The analog components should be placed in their

own ground island which connects to the PAD directly at

the IC, and all analog components should connect directly

to this island.

The VDD supply decoupling capacitors should connect to

the IC with short traces, with multiple vias if needed.

Connect the ILIM traces to the low-side MOSFET directly

at the drain pins, and route these traces over to the ILIM

resistor on another layer if needed.

Route the VOUT/FB feedback traces in a “quiet” layer, away

from noise sources. Avoid routing near any of the high-

noise switching signals or other noise sources.

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