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SSTU32864EC/G 数据表(PDF) 13 Page - NXP Semiconductors |
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SSTU32864EC/G 数据表(HTML) 13 Page - NXP Semiconductors |
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13 / 21 page ![]() 9397 750 14092 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 22 October 2004 13 of 21 Philips Semiconductors SSTU32864 1.8 V configurable registered buffer for DDR2 RDIMM applications VID = 600 mV VREF =VDD/2 VIH =VREF + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs. VIL =VREF − 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs. Fig 9. Voltage waveforms; set-up and hold times tPLH and tPHL are the same as tPD. Fig 10. Voltage waveforms; propagation delay times (clock to output) tPLH and tPHL are the same as tPD. VIH =VREF + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs. VIL =VREF − 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs. Fig 11. Voltage waveforms; propagation delay times (reset to output) tsu VIH VIL VID th CK CK input VREF VREF VICR 002aaa374 VOH VOL output tPLH 002aaa375 VTT VICR VICR tPHL CK CK Vi(p-p) tPHL 002aaa376 LVCMOS RESET output VTT VDD/2 VIH VIL VOH VOL |
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