SSTUB32864ECSLASHG datasheet(2/19 Pages) NXP

2 / 19 page

SSTUB32864_2

Product data sheet

Rev. 02 — 26 March 2007

2 of 19

NXP Semiconductors

SSTUB32864

1.8 V conﬁgurable registered buffer for DDR2-800 RDIMM applications

Features

I Conﬁgurable register supporting DDR2 Registered DIMM applications

I Conﬁgurable to 25-bit 1 : 1 mode or 14-bit 1 : 2 mode

I Controlled output impedance drivers enable optimal signal integrity and speed

I Meets SSTUB32864 JEDEC speciﬁcation speed performance

I Supports up to 450 MHz clock frequency of operation

I Optimized pinout for high-density DDR2 module design

I Chip-selects minimize power consumption by gating data outputs from changing state

I Supports SSTL_18 data inputs

I Differential clock (CK and CK) inputs

I Supports LVCMOS switching levels on the control and RESET inputs

I Single 1.8 V supply operation (1.7 V to 2.0 V)

I Available in 96-ball, 13.5 mm × 5.5 mm, 0.8 mm ball pitch LFBGA package

Applications

I 400 MT/s to 800 MT/s DDR2 registered DIMMs without parity

Ordering information

Table 1.

Ordering information

Tamb =0 °Cto+70 °C.

Type number

Solder process

Package

Name

Description

Version

SSTUB32864EC/G

Pb-free (SnAgCu

solder ball compound)

LFBGA96

plastic low proﬁle ﬁne-pitch ball grid array package;

96 balls; body 13.5

× 5.5 × 1.05 mm

SOT536-1

SSTUB32864EC/G 数据表(PDF) 2 Page - NXP Semiconductors

SSTUB32864EC/G 数据表(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

数据表下载