Preliminary
4-201
RF2363
Rev B2 010129
4
Pin
Function
Description
Interface Schematic
1RF OUT1
RF output pin for ~900MHz LNA. This pin is an open-collector output. It
must be biased to either VCC or pin 4 through a choke or matching
inductor. It is typically matched to 50
Ω with a shunt bias/matching
inductor and series blocking/matching capacitor. Refer to application
schematics.
2GND
Ground connection.
NOTE: Ground traces on pins 2 and 7 are equivalent to a small amount
of inductance (~ 0.75nH). The dimensions of these lines are as follows.
Pin 2: L=56mils, W =15mils, H=31mils
Pin 7: L=56mils, W =15mils, H=31mils
Dielectric is FR-4.
3RF OUT2
RF output pin for ~1900MHz LNA. This pin is an open-collector output.
It must be biased to either VCC or pin 4 through a choke or matching
inductor. It is typically matched to 50
Ω with a shunt bias/matching
inductor and series blocking/matching capacitor. Refer to application
schematics.
4EN1
Enable pin for ~900MHz LNA. A voltage equal to the supply voltage
LNA. This pin should be disabled (0V) when the ~1900MHz LNA is in
use.
5EN2
Enable pin for ~1900MHz LNA. A voltage equal to the supply voltage
LNA. This pin should be disabled (0V) when the ~900MHz LNA is in
use. See package drawing for description of pin orientation.
See pin 3.
6RF IN2
RF input pin for ~1900MHz. This pin is matched to approximately 50
Ω
at DCS/PCS frequencies. An external AC coupling capacitor is required
at this pin.
See pin 3.
7GND
Same as pin 2.
See pin 2.
8RF IN1
RF input pin for ~900MHz. This pin is matched to approximately 50
Ω at
GSM/Cellular frequencies. An external AC coupling capacitor is
required at this pin.
See pin 1.
RF IN1
RF OUT1
To Bias
Circuits
Pin 7
Pin 2
LNA2
LNA1
RF IN2
RF OUT2
EN2
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