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Preliminary
8-37
RF3404
Rev A1 010918
8
State Table (Typical Values for VCC=2.75V)
RF3404 Control States
Control Logic
Gain Control Logic
Parameter
Cellular
PCS
LNA On
LNA Off
LNA On
LNA Off
LNA at Max IIP3 LNA at Nom IIP3
LNA at Max IIP3 LNA at Nom IIP3
Mixer
Amp On
Mixer
Amp Off
Mixer
Amp On
Mixer
Amp Off
Mixer
Amp On
Mixer
Amp Off
Mixer
Amp On
Mixer
Amp Off
Mixer
Amp On
Mixer
Amp Off
Mixer
Amp On
Mixer
Amp Off
Gain (dB)
25
16
24.5
15
4
-3
25
15
24
15.5
5
-4
Noise Figure (dB)
2.0
4
2.1
4.5
15
22
2.2
5.0
2.3
6
15
22
Input IP3 (dBm)
-9
1.5
-8
2
+10
+20
-8.5
2
-7.5
1
+10
+20
Total Current
29.5
23.5
28
22
24
18
29.5
23.5
28
22
24
18
BAND SEL
IF SEL
LNA GAIN
MIX GAIN
ENABLE
PCS CDMA High Gain
10111
PCS CDMA Mid1 Gain
10101
PCS CDMA Mid2 Gain
10011
PCS CDMA Low Gain
10001
Cell CDMA High Gain
00111
Cell CDMA Mid1 Gain
00101
Cell CDMA Mid2 Gain
00011
Cell CDMA Low Gain
00001
Cell FM High Gain
01111
Cell FM Mid1 Gain
01101
Cell FM Mid2 Gain
01011
Cell FM Low Gain
01001
Shutdown
XXXX
0
Not Defined
1
1
X
X
1
Mode
BAND_SEL
IF_SEL
ENABLE
TX BUF
DIVIDER ENABLE
Cellular FM
0
1
1
X
X
Cellular CDMA
0
0
1
X
X
PCS CDMA
1
0
1
X
X
Power Down
1
1
1
X
X
Power Down 2
X
X
0
X
X
TX Buffer Enabled
X
X
1
1
X
Divider Enabled
X
X
1
X
1
LNA Mode
Mixer Mode
LNA GAIN
MIX GAIN
IP SET
High Gain
High Gain
1
1
1
High Linearity (off-chip)
High Gain
Low Gain
1
0
1
High Linearity (off-chip)
High Gain
High Gain
1
1
0
Low Linearity (on-chip)
High Gain
Low Gain
1
0
0
Low Linearity (on-chip)
Low Gain
High Gain
0
1
X
Low Gain
Low Gain
0
0
X
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