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Preliminary
8-40
RF3404
Rev A1 010918
8
Outline Drawing
Pin
Function
Description
Interface Schematic
46
IP SET
Logic input. High selects maximum IIP3 mode.
47
GND
Low-inductance ground required.
48
VCC3
VCC connection for internal LO amplifiers. Internal RF bypass capaci-
tor. External bypass between 1nF and 47nF may be required.
IP SET
0.5000
1
8
9
12
15
22
23
28
29
34
35
38
39
44
45
48
30
31
24
27
26
25
24
43
16
11
46
CDMA IF+
CDMA IF-
BAND SEL
VCC4
FM IF+
FM IF-
IF SEL
IP SET
Divider Enable
LO IN
VCC3
ENABLE
TX BUFFER
ENABLE
LNA
GAIN
PCS
LO OUT
Cell
LO OUT
MIXER
GAIN
VCC2
PCS
LNA IN
Cell
LNA IN
GND
VCC1
0.2500
0.25
1.5000
1.50
0.50
8.0000
8.00
1.6000
1.60
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