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SA9401 数据表(PDF) 2 Page - Sames |
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SA9401 数据表(HTML) 2 Page - Sames |
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2 / 16 page ![]() sames SA9401 2 Package : PLCC - 44 SA9401 CLKIN A6 A5 PCMFSC DR-00603 3 4 5 6 8 79 10 A4 GND A3 A2 A1 A0 CLK_SEL 40 41 42 43 44 1 2 36 37 39 38 PS2 15 11 14 13 12 16 17 21 18 19 20 WD_INT A13 A12 31 35 34 33 32 26 24 22 23 25 27 28 30 29 TEST A10 GND A11 A9 A8 FS1 PIN DESCRIPTION 1, 23 I GND Supply Ground 12, 34 I VCC +5V Power Supply 27 I FS1 Frame Synchronisation (active low) 6 I CLKIN Master clock input (either 8192kHz or 2048 Khz dependent on logic level of "CLK _SEL") 8 O 2MCLK 2048 kHz clock derived internally from CLKIN 10 O 8KFS 8 kHz Frame Synchronisation output. 5 O PCMFSC 8 kHz Auxilliary Frame Synchronisation Output 11 O INTRFRQ Square Wave Intrude Tone 13 O INTRCAD Intrude Tone Cadence Signal 15 O PCM_OUT Tri-state PCM Highway tone output 41, 42, 43, 44, O A0..A13 EPROM Address Lines 2, 3, 4, 39, 26, 25, 22, 24, 21, 20 Pin No I/0 Designation Description |
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