ADP2302ARDZ-3.3-R7 datasheet(20/28 Pages) AD

20 / 28 page

ADP2302/ADP2303

Rev. 0 | Page 20 of 28

DESIGN EXAMPLE

This section provides the procedures to select the external compo-

nents, based on the example specifications listed in Table 10.

The schematic for this design example is shown in Figure 51.

Because the output current is 3 A, the ADP2303 is chosen for

this application.

Table 10. Step-Down DC-to-DC Regulator Requirements

Parameter

Specification

Additional

Requirements

Input Voltage, VIN

12.0 V ± 10%

None

Output Voltage, VOUT

3.3 V, 3 A, 1% VOUT ripple

at full load condition

None

Programmable

UVLO Voltage

VIN start-up voltage

approximately 7.8 V

None

PGOOD

Not used

None

CATCH DIODE SELECTION

Select the catch diode. A Schottky diode is recommended for best

efficiency because it has a low forward voltage drop and faster

switching speed. The average current of the catch diode in

normal operation, with a typical Schottky diode forward

voltage, can be calculated using the following equation:

(max)

)

(

LOAD

OUT

AVG

DIODE

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

where:

VOUT = 3.3 V.

VIN = 12 V.

ILOAD(max) = 3 A.

VD = 0.4 V.

Therefore, IDIODE(AVG) = 2.1 A.

In this case, selecting a SSB43L, 4.0 A, 30 V surface-mount

Schottky diode results in more reliable operation.

INDUCTOR SELECTION

Select the inductor by using the following equation:

()

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

OUT

LOAD

OUT

(max)

where:

VOUT = 3.3 V.

VIN = 12 V.

ILOAD(max) = 3 A.

VD = 0.4 V.

fSW = 700 kHz.

This results in L = 4.12 μH. The closest standard value is 4.7 μH;

therefore, ΔIRIPPLE = 0.7 A.

The inductor peak current is calculated using the following

equation:

(max)

RIPPLE

LOAD

PEAK

where:

ILOAD(max) = 3 A.

ΔIRIPPLE = 0.7 A.

The calculated peak current for the inductor is 3.4 A. Therefore,

in this application, select VLF10040T-4R7N5R4 as the inductor.

OUTPUT CAPACITOR SELECTION

Select the output capacitor based on the minimum output

voltage ripple requirement, according to the following equation:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

OUT

RIPPLE

ESR

where:

ΔIRIPPLE = 0.7 A.

fSW = 700 kHz.

ΔVRIPPLE = 33 mV (1% of output voltage).

If ESR of the ceramic capacitor is 3 mΩ, then COUT = 4 μF.

Because the output capacitor is one of two external components

that control the loop stability and according to the recommended

external components in Table 11, choose two 47 μF capacitor

with a 6.3 V voltage rating in this application.

RESISTIVE VOLTAGE DIVIDER SELECTION

The output feedback resistive voltage divider is

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

BOT

TOP

OUT

800

For the 3.3 V output voltage, choose RTOP = 31.6 kΩ and

RBOT = 10.2 kΩ as the feedback resistive voltage divider

according to the recommended values in Table 11.

The resistive voltage divider for the programmable VIN start-up

voltage is

μA

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

EN1

EN2

STARTUP

If VSTARTUP = 7.8 V, choose REN2 = 10.2 kΩ, and then calculate

REN1, which, in this case, is 56 kΩ.

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