74LVCV2G66GD datasheet(10/23 Pages) NXP

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74LVCV2G66

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Product data sheet

Rev. 3 — 16 June 2010

10 of 23

NXP Semiconductors

74LVCV2G66

Overvoltage tolerant bilateral switch

11.1 Waveforms and test circuit

Measurement points are given in Table 10.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 11. Input (nY or nZ) to output (nZ or nY) propagation delays

001aaa541

tPLH

tPHL

nY or nZ

input

nZ or nY

output

GND

VOH

VOL

Measurement points are given in Table 10.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 12. Enable and disable times

001aaa542

tPLZ

tPHZ

switch

disabled

switch

enabled

switch

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nE input

nY or nZ

VOL

VOH

VCC

GND

tPZL

tPZH

Table 10.

Measurement points

Supply voltage

Input

Output

VCC

2.3 V to 2.7 V

0.5VCC

VOL +0.1VCC

VOH − 0.1VCC

2.7V

1.5V

VOL +0.3 V

VOH − 0.3 V

3.0V to 3.6V

1.5V

VOL +0.3 V

VOH − 0.3 V

4.5 V to 5.5 V

0.5VCC

VOL +0.3 V

VOH − 0.3 V

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