WM8711SEDSSLASHR datasheet(29/47 Pages) WOLFSON

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WM8711 / WM8711L

PD Rev 4.4 April 2007

MASTER AND SLAVE MODE OPERATION

The WM8711/L can be configured as either a master or slave mode device. As a master mode device

the WM8711/L controls sequencing of the data and clocks on the digital audio interface. As a slave

device the WM8711/L responds with data to the clocks it receives over the digital audio interface. The

mode is set with the MS bit of the control register as shown in Table 10.

BIT

LABEL

DEFAULT

DESCRIPTION

0000111

Digital Audio Interface

Format

Master Slave Mode Control

1 = Enable Master Mode

0 = Enable Slave Mode

Table 10 Programming Master/Slave Modes

As a master mode device the WM8711/L controls the sequencing of data transfer (DACDAT) and

output of clocks (BCLK, DACLRC) over the digital audio interface. It uses the timing generated from

the MCLK input as the reference for the clock and data transitions. This is illustrated in Figure 18.

DACDAT is always an input to the WM8711/L independent of master or slave mode.

BCLK

DACDAT

DACLRC

WM8711

DAC

DSP

DECODER

Figure 18 Master Mode

As a slave device the WM8711/L sequences the data transfer (DACDAT) over the digital audio

interface in response to the external applied clocks (BCLK, DACLRC). This is illustrated in Figure 19.

BCLK

DACDAT

DACLRC

WM8711

DAC

DSP

DECODER

Figure 19 Slave Mode

Note that the WM8711/L relies on controlled phase relationships between audio interface BCLK,

DACLRC and the master MCLK or CLKOUT. To avoid any timing hazards, refer to the timing section

for detailed information.

WM8711SEDS/R 数据表(PDF) 29 Page - Wolfson Microelectronics plc

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