ATSAM3S datasheet(38/65 Pages) ATMEL

38 / 65 page

6500AS–ATARM–11-Dec-09

SAM3S Summary

The reset circuitry is based on a zero-power power-on reset cell and a brownout detector cell.

The zero-power power-on reset allows the Supply Controller to start properly, while the soft-

ware-programmable brownout detector allows detection of either a battery discharge or main

voltage loss.

The Slow Clock generator is based on a 32 kHz crystal oscillator and an embedded 32 kHz RC

oscillator. The Slow Clock defaults to the RC oscillator, but the software can enable the crystal

oscillator and select it as the Slow Clock source.

The Supply Controller starts up the device by sequentially enabling the internal power switches

and the Voltage Regulator, then it generates the proper reset signals to the core power supply.

It also enables to set the system in different low power modes and to wake it up from a wide

range of events.

10.5

Clock Generator

The Clock Generator is made up of:

• One Low Power 32768Hz Slow Clock oscillator with bypass mode

• One Low-Power RC oscillator

• One 3-20 MHz Crystal Oscillator, which can be bypassed

• One Fast RC oscillator factory programmed, 3 output frequencies can be selected: 4, 8 or 12

MHz. By default 4 MHz is selected.

• One 60 to 130 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller

• One 60 to 130 MHz programmable PLL (PLLA), capable to provide the clock MCK to the

processor and to the peripherals. The input frequency of PLLA is from 7.5 and 20 MHz.

ATSAM3S 数据表(PDF) 38 Page - ATMEL Corporation