74LVC2T45GD datasheet(24/36 Pages) PHILIPS

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74LVC_LVCH2T45

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Product data sheet

Rev. 4 — 20 August 2010

24 of 36

NXP Semiconductors

74LVC2T45; 74LVCH2T45

Dual supply translating transceiver; 3-state

Table 17 gives a sequence that will illustrate data transmission from system-1 to system-2

and then from system-2 to system-1.

[1]

H = HIGH voltage level;

L = LOW voltage level;

Z = high-impedance OFF-state.

14.3 Power-up considerations

The device is designed such that no special power-up sequence is required other than

GND being applied first.

Pull-up or pull-down only needed for 74LVC2T45.

Fig 17. Bidirectional logic level-shifting application

001aai932

PULL-UP/DOWN

system-1

VCC(A)

GND

VCC(B)

DIR

74LVC2T45

74LVCH2T45

PULL-UP/DOWN

I/O-1

DIR CTRL

VCC1

I/O-2

DIR CTRL

VCC2

VCC1

VCC2

system-2

Table 17.

Description of bidirectional logic level-shifting application[1]

State

DIR CTRL

I/O-1

I/O-2

Description

output

input

system-1 data to system-2

system-2 is getting ready to send data to system-1. I/O-1 and I/O-2

are disabled. The bus-line state depends on bus hold

DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The bus-line

state depends on bus hold

input

output

system-2 data to system-1

Table 18.

Typical total supply current (ICC(A) + ICC(B))

VCC(A)

VCC(B)

Unit

0 V

1.8 V

2.5 V

3.3 V

5.0 V

0 V

< 1< 1< 1

< 1

μA

1.8 V

< 1

< 2

μA

2.5 V

< 1

< 2

μA

3.3 V

< 1

< 2

μA

5.0 V

< 1

< 2

μA

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