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74LVC2T45GD 数据表(PDF) 25 Page - NXP Semiconductors |
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74LVC2T45GD 数据表(HTML) 25 Page - NXP Semiconductors |
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25 / 36 page ![]() 74LVC_LVCH2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 — 20 August 2010 25 of 36 NXP Semiconductors 74LVC2T45; 74LVCH2T45 Dual supply translating transceiver; 3-state 14.4 Enable times Calculate the enable times for the 74LVC2T45; 74LVCH2T45 using the following formulas: • tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A) • tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A) • tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B) • tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B) In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the 74LVC2T45; 74LVCH2T45 initially is transmitting from A to B, then the DIR bit is switched, the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay. |
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