Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

Operation modes

M48T59, M48T59Y, M48T59V

10/32

2.2

Write mode

The M48T59/Y/V is in the WRITE Mode whenever W and E are low. The start of a WRITE is

referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the

earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W

WRITE cycles to avoid bus contention; however, if the output bus has been activated by a

Figure 6.

Write enable controlled, write mode AC waveforms

Figure 7.

Chip enable controlled, write mode AC waveforms

AI01386

tAVAV

tWHAX

tDVWH

DATA INPUT

A0-A12

E

W

DQ0-DQ7

VALID

tAVWH

tAVEL

tWLWH

tAVWL

tWLQZ

tWHDX

tWHQX

AI01387B

tAVAV

tEHAX

tDVEH

A0-A12

E

W

DQ0-DQ7

VALID

tAVEH

tAVEL

tAVWL

tELEH

tEHDX

DATA INPUT