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LTM8031EVPBF 数据表(PDF) 12 Page - Linear Technology |
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LTM8031EVPBF 数据表(HTML) 12 Page - Linear Technology |
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12 / 20 page ![]() LTM8031 12 8031fa Shorted Input Protection Care needs to be taken in systems where the output will be held high when the input to the LTM8031 is absent. This may occur in battery charging applications or in battery back-up systems where a battery or some other supply is diode ORed with the LTM8031’s output. If the VIN pin is allowed to float and the RUN/SS pin is held high (either by a logic signal or because it is tied to VIN), then the LTM8031’s internal circuitry will pull its quiescent current through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground the RUN/SS pin, the internal switch current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LTM8031 can pull large currents from the output through the VIN pin, potentially damaging the device. Figure 2 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. PCB Layout Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8031. The LTM8031 is neverthe- less a switching power supply and care must be taken to minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified APPLICATIONS INFORMATION Figure 2. The Input Diode Prevents a Shorted Input from Discharging a Back-Up Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LTM8031 Runs Only When the Input is Present VOUT VIN RUN/SS BIAS RT ADJ LTM8031 8031 F02 VOUT GND VIN AUX SYNC operation with a haphazard or poor layout. See Figure 3 for a suggested layout. Ensure that the grounding and heat sinking are acceptable. A few rules to keep in mind are: 1. Place the RADJ and RT resistors as close as possible to their respective pins. 2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8031. If a capacitor is connected to the FIN terminals, place it as close as possible to the FIN terminals, such that its ground connection is as close as possible to that of the CIN capacitor. 3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8031. 4. Place the CIN and COUT capacitors such that their ground currents flow directly adjacent or underneath the LTM8031. 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8031. 6. Use vias to connect the GND copper area to the board’s internal ground plane. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. |
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